ICALEPCS 2009
THD005
Application of EPICS on F3RP61 to Accelerator Control
A.Kiyomichi, H.Nakagawa, J.-I.Odagiri*, K.Furukawa, K.Mikawa, N.Yamamoto, S.Murasugi, S.Yamada, T.T.Nakamura (KEK) M.Takagi, S.Motohashi (Kanto Information Service (KIS), Accelerator Group) T.Nakamura (MELCO SC) N.Nagura (Nippon Advanced Technology Co. Ltd.) M.Komiyama (RIKEN Nishina Center) A.Uchiyama (SHI Accelerator Service ltd.) H.Shiratsu, K.Kameda, T.Natsui (Yokogawa)
A new type of Input / Output Controller (IOC) has been developed based on F3RP61, a CPU module of FA-M3 Programmable Logic Controller (PLC). Since the CPU module runs Linux as its operating system, it takes no special effort to run EPICS IOC core program on the CPU module. With the aid of wide variety of I/O modules of FA-M3 PLC, the F3RP61-based IOC has various applications in accelerator control, such as magnet power supply control, monitoring interlock system, stepping motor control, data acquisition from beam monitors and so forth. The adoption of the new IOC makes the architecture of accelerator control systems simpler by unifying the two layers of front-end computers, i.e., the IOC layer and the PLC layer, into one layer. We found that the simplification of the control system architecture helps us to reduce the time and cost for the development and maintenance of the application software.