A pulse-pattern generator produces bit patterns at user specified times. It can be used to control the timing of experimental procedures - each bit is used as a trigger line for external devices like a switch-able power supply. The development was initiated by the need of ion trap facilities like SHIPTRAP and HITRAP at GSI, ISOLTRAP at CERN or ClusterTrap at the University of Greifswald, Germany. Each of those facilities has about three ion traps. The manipulation and transfer of ions from one trap to another requires a complex sequence of a few seconds duration with about 30 steps with a precision of 100 ns. The sequence must be synchronized to external events like the timing structure of an accelerator. As a solution, an FPGA card from National Instruments is used. The LabVIEW FPGA module translates the graphical code to VHDL, which is processed further by the tool chain of the FPGA manufacturer Xilinx. The FPGA is clocked with 40MHz, which yields a resolution of 25ns. The user defined bit patterns have a width of 64 bits and eight trigger inputs allow for synchronization with external signals. Presently, this solution is used at six different experiments at four institutes.