A Signal Processing Board for the J-PARC Slow Extraction Feedback Control
A.Kiyomichi, H.Nakagawa, H.Sato, H.Someya, M.Tomizawa, R.Muto, T.Adachi (KEK) K.Noda (NIRS) K.Mochiki (Tokyo City University Department of Nuclear Safety Engineering) S.Onuma* (Tokyo City University Graduate School of Engineering, Infomation Engineering)
J-PARC (Japan Proton Accelerator Research Complex) is a new accelerator facility to produce MW-class high power proton beams. From the main ring high energy protons are extracted in a slow extracted mode for hadrons experiments. The slow extraction beam is required with as small ripple as possible to prevent pileup events in particle detectors or data acquisition systems. Based on preliminary experiments at HIMAC (Heavy Ion Medical Accelerator in Chiba) using a prototype signal processing board, we have developed a new signal processing board for the spill feedback control. The circuit board consists of three signal input ports for gate, spill intensity and residual beam intensity in the main ring, three signal output ports for spill control magnets, two DSPs (TMS320C6713) for the analysis of power spectrum and the spill feedback control, dual port memories, FPGAs and a LAN interface for remote control to change feedback parameters. Using this board, digital filtering, phase-shift processing, servo feedback control, real-time calculation of power spectrum density and adaptive control are examined.