The innermost part of the ATLAS experiment is a pixel detector, built of 1744 individual detector modules. To operate the modules, readout electronics, and other detector components, a complex power supply and control system is necessary. While the hardware is mainly built by units which are specially adapted to the needs of the pixel detector, the control software has to support these special needs, while in parallel it is embedded into the ATLAS wide control system. Core of the pixel detector control is a PVSS based SCADA system in combination with a finite state machine. An overview on the pixel detector hardware and a report on the commissioning of the final control system will be given. We concentrate on the description of the finite state machine and its interaction with several additional protection routines.